Thursday, December 11, 2014

Samsung begins 14nm contract chip production

Summary:Samsung Electronics has begun producing contract chips using its 14-nanometre FinFET process for an unspecified client, a top executive has said.
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99% BAD HARDWARE WEEK: Well, 14nm is only marketing shrink. DPT ArFi could etch fins at Samsung transistors, BUT NOT IT'S HALF PITCH smaller than 27nm. :) 
Thus, consider it as low power version of 22nm node.

OpenPower Systems Coming In Mid-2015

 The ecosystem for Power Systems machines is building faster than many might be expecting, and it looks like a bunch of new machines will be coming to market by the middle of next year that are based on designs from vendors other than IBM.
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99% BAD HARDWARE WEEK:

Wednesday, December 10, 2014

Chip shrink will continue: EUV double patterning for 7nm logic



NXE:3350 is EUVL scanner for 14nm requiring commercial throughput of 1500 wafers per day. There is no 7nm logic without EUVL double patterning or ArFi quadruple patterning. Best should be combination EUVL double patterning with the rest of metallization using triple patterning ArFi.
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99% BAD HARDWARE WEEK:10 nm logic could be made experimentally with single patterning EUVL and quadruple patterning ArFi. DRAM without any problem in 2017 with 14nm halh pitch. As you can see from the diagram above.
The ultrathin dielectric layers of Samsung latest DRAMs are composed of atomic materials, aka atomic layer deposition.
Retrospection: In 2006 we have had first EUVL advanced development tool. Are EUVL deadly late after 11 left years in 2017. If not able to produce even DRAMs in 2017 EUVL is definitely dead in the vacuum ( please take in account that EUVL is solely vacuum and not immersion technology like ArFi). Why ? Because Apollo Mon program was completely realized in 11 years. Russian Moon technology was dead born. Thus, let us see EUVL FLYING in the next 3 years, or ...face serious consequences in processor and component advancement stall.

Tuesday, December 09, 2014

TSMC to Use EUV for 7nm, Says ASML


“The EUV scanners are for 10 nanometers,” said ASML executive vice president Frits van Hout in an interview on the sidelines of a TSMC event on Dec. 4. “They’re going to use them to prepare for production in 7 nanometers.”
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99% BAD HARDWARE WEEK: TSMC to use ArF immersion lithography all the way down to 10 nm feature sizes. EUVL for the finest details in first step because EUVL still  has no more than 40 Wafer per hour trough-output.

Also, TSMC plans to employ its EUV lithography technology for some layers in the 10nm or 7nm generation if technology development proceeds smoothly. The schedule for the trial production with the 7nm process has not been determined yet. But it is expected to start in 2018 according to Moore's Law.

HP's Revolutionary New Computer Is Coming In 2016


Basically, the machine uses a new homegrown operating system, a new superfast way to transfer data that uses light (i.e. photonics) instead of the copper wiring traditionally used by Ethernet cables and a whole new kind of memory called "memristors." The first version of the The Machine operating system, which will reportedly be called Linux++, will be released in 2015 so that developers can become familiar with it. The final version of the operating system will be called Carbon, and HP is said to be constructing it from scratch.

The Machine’s design includes other novel features such as optical fiber instead of copper wiring for moving data around. HP’s simulations suggest that a server built to The Machine’s blueprint could be six times more powerful than an equivalent conventional design, while using just 1.25 percent of the energy and being around 10 percent the size.

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99% BAD HARDWARE WEEK: Wow. Why it is important ?
U.S. data centers consumed 91 billion kilowatt-hours of electricity in 2013—twice as much as all the households in New York City—according to the Natural Resources Defense Council.
Servers, lets sing: New York, New York.

Monday, December 08, 2014

IBM's Power 9 processor



We could guess at some extent architecture and performance on IBM's Power 9 processor for year 2017 in 10 nm SOI,  after Power 8 in 22nm SOI above.
If history is any guide, then IBM will create Power 8+ chips using a 14 nanometer process in year 2015 with 50%  more processors on the same chip area and Power 9 chips using a 10 nanometer process. This is something that IBM will not, of course, confirm.

Power 9 will mainly differ from Power 8 in HMC 2.0 memory support. Power 9+ in 2019 will implement it in 7 nm SOI, of course if SOI implementatioin  is possible at all in 7 nm. We are at 22 nanometers now, and I think that everybody more or less agrees that silicon will run out of steam in a few technology nodes. We think it will be around 7 nanometers. I believe that the path to 14 nanometers is quite clear, and the path to 10 nanometers is also reasonably clear. I think the point of inflection will come around 7 nanometers, where we will have to think of a replacement for silicon, and at IBM we have been looking at this for quite some time.” Perhaps piezo transistors able to run at 4 Ghz clock but at only 0.15V. Squared, that means 50 times lower power consumption. Or 50 times more SIMULTANEOUS switching than with FIN FETs.
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99% BAD HARDWARE WEEK: However Power 8 is outstanding and impressive itself alone. That is why Power 9 will power Summit supercomputer at stagerring 150 PFlops in the year 2017.
Intel follows IBM Power 8 lead with 6B transistors Haswell-EP 14-18C on the approximately same die area.



High-end full frame roundup (2014)


The 36MP sensor and lack of AA filter mean the Nikon D810 can function as both a sharp full-frame and APS-C sensor body in one; DX lenses will still have 16MP to call their own.
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99% BAD HARDWARE WEEK: DX lenses are much lighter than Full Frame ones for telephoto. Yeah at small photos angles sensor area is smaller as you can learn from first Sony FF models.

Saturday, December 06, 2014

The Orion spacecraft built for 2030s is no smarter than your phone

BAE Systems continues to emphasize the integration of the Space Wire protocol and plans offered a next generation SpaceWire-enabled processor board by 2009 below.


Orion's computer can process 480 million instructions per second. It's also 25 times faster than the computers at the International Space Station, according to NASA.
The computers are running eIBM's PowerPC 750FX single-core processors, which were first launched in 2002.As for Orion's main computer, the space agency is using a Honeywell International Inc. flight computer originally built for Boeing's 787 jet airliner. The computer, which at this point runs everything on the uncrewed spacecraft, has been ruggedized for space travel with larger housing, a thicker circuit board and hardware to minimize vibrations.
The processor has 10.4 million transistors, is manufactured by BAE Systems using either 250 or 150 nm process and has a die area of 130 mm². It operates at 110 to 200 MHz. The CPU itself can withstand 200,000 to 1,000,000 Rads and temperature ranges between −55 and 125 °C. The RAD750 packaging and logic functions has a price tag in excess of $200,000: the high price is mainly due to radiation hardening revisions to the PowerPC 750 architecture and manufacturing, stringent quality control requirements, and extended testing of each processor chip manufactured.

"The Time-Triggered Ethernet gives you a time-based guaranteed delivery," said Lemke. "It lets us use Ethernet for controlling the entire spacecraft -- every command the computer sends, all the data from the sensors that goes to the flight computers."
Orion has one basic Ethernet cable for basic communications, but all critical data will travel across three different Ethernet lines.
"Orion is not incredibly high tech, but compared to what else is flying in space, it's leading edge," said Lemke. "It's much more capable than the space station or more capable than what the shuttles were. It's state-of-the-art compared to that ,but it's not state-of-the-art compared to what you can get at Best Buy.
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99% BAD HARDWARE WEEK:

Friday, December 05, 2014

IARPA develops Josephson junction cryogenic supercomputer



Studies indicate that superconducting supercomputers may be capable of 1 PFLOP/s for about 25 kW , including the cryogenic cooler. Proof at smaller scales is an essential first step before any attempt to build a supercomputer.  Single flux quantum (SFQ) logic circuits have no static power dissipation, and new energy efficient cryogenic memory ideas allow operation of memory and logic within the cold environment.
 Primary study also suggested that superconducting logic speed can stretch up to 770 GHz and deliver around 100 petaflops of performance, while consuming only 200 kilowatts of power. That is some 1000 times more energy efficient than the state of art CMOS supercomputer.

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99% BAD HARDWARE WEEK:  Josephson junction consume only 1aJ of energy .
1018 switching of them at the same time consume per second 1 Watt. One billion of supercomputing chips thus consume only 1W. Finally, no more dark silicon problem :)  Oh, what about 200 KW mentioned consumption above ? Well, that is consumption of cryogenic refrigator. You can't miss it, isn't it ?
1 billion chips each able 100 GFlops means performance well above 1 Exaflops.


Sony kept passwords in a file named ‘passwords’


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99% BAD HARDWARE WEEK: Let me guess administrator password: 123456 ?? :)

Wednesday, December 03, 2014

How actually big is Gangnam Style at Youtube ?

We never thought a video would be watched in numbers greater than a 32-bit integer (=2,147,483,647 views), but that was before we met PSY. "Gangnam Style" has been viewed so many times we have to upgrade!


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99% BAD HARDWARE WEEK: Well, we thought people at Google have been known something about programming and that have same basic math skills. :)

2^32      = 4,294,967,296
2^31 -1  = 2,147,483,647


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